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c 3/5 30 XP

Makefiles

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Quick Reference

Makefile template:

CC = gcc
CFLAGS = -Wall -Wextra -std=c17 -g

program: main.o student.o io.o
	$(CC) $(CFLAGS) -o program main.o student.o io.o

main.o: main.c student.h
	$(CC) $(CFLAGS) -c main.c

student.o: student.c student.h
	$(CC) $(CFLAGS) -c student.c

io.o: io.c student.h
	$(CC) $(CFLAGS) -c io.c

.PHONY: clean
clean:
	rm -f program *.o

Key concepts:

Term Meaning
Target What to build (left of :)
Dependencies What it depends on (right of :)
Recipe Commands to build it (indented with TAB)
$(CC) Variable substitution
.PHONY Target is a command, not a file

Include guard pattern:

#ifndef STUDENT_H
#define STUDENT_H
// ... declarations ...
#endif

What goes where:

In .h (interface) In .c (implementation)
#ifndef guard #include "student.h"
typedef struct { ... } Function bodies
Function prototypes #include <stdlib.h> etc.
#define constants Variable definitions

Common Pitfalls

  • Tabs vs spaces — Makefile recipes MUST use actual tab characters, not spaces. This is the #1 Makefile error.
  • Missing header dependencies — If a .o target doesn’t list .h dependencies, changes to the header won’t trigger recompilation.
  • Undefined reference — Linker error: function declared but never implemented. Check your .c files.
  • Include without guards — Headers included twice cause duplicate definition errors.
  • <> vs "" — Use "" for your own headers, <> for system headers.
  • Forgetting .PHONY — A file named clean breaks make clean.

Unlocks

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